1. Field of the Invention
The present invention relates to a current detection circuit for detecting current flowing to a load and, more specifically, to the current detection circuit capable of eliminating a dead band in which current detection is not possible.
2. Description of Related Art
A common method of controlling the various motors used in automotive and other applications today is to monitor the current flowing to the motor for use in pulse width modulation (PWM) control. To accomplish this, the current flowing to the motor must be accurately detected for feedback to a microprocessor or other control circuit. Methods for detecting the current value include detecting a change in field strength and converting this change to a current value, and converting the potential difference at both ends of a low resistance shunt resistor to a current value. In the latter case current is monitored by converting the current flowing to the shunt resistor to a voltage, and an operational amplifier is used for this purpose.
FIG. 5 is a circuit diagram of a current detection circuit for detecting current flowing to a motor according to the related art. Note that the current detection circuit shown in FIG. 5 is described below as applied to a motor control circuit for controlling a motor by means of PWM control.
Referring to FIG. 5, this motor control circuit 100 comprises a driver circuit 101, current detection circuit 102, and control circuit 103. The driver circuit 101 comprises a plurality of power elements 101a to 101d in an H-bridge construction for driving a motor M. In FIG. 5 these power elements 101a to 101d are MOSFETs by way of example only. The current detection circuit 102 detects the current flowing to the motor M. Based on the current detected by the current detection circuit 102, the control circuit 103, which is typically a microprocessor, duty controls the MOSFETs 101a to 101d of the driver circuit 101 to achieve a specific current flowing to the motor M.
A shunt resistor 111 in the current detection circuit 102 converts current flowing to the motor M to a voltage. An operational amplifier 112, npn-type transistor 113, and resistors 114 to 116 form an amplifying circuit which amplifies the potential difference between the ends of the shunt resistor 111 and converts the potential difference to a voltage Va referenced to the ground potential. This voltage Va is then output from buffer 117 to the control circuit 103.
Based on this supplied voltage Va, the control circuit 103 duty controls the power elements of the driver circuit 101 so that the current flowing to the motor M is maintained at a set value. For example, if the control circuit 103 determines that the current flowing to the motor M is below this setting based on this voltage Va, it increases the duty cycle of the control signals to the MOSFETs 101a to 101d in a feedback control loop until the current flowing to the motor M is adjusted to the setting.
Let us assume here that MOSFETs 101a and 101d have been turned on to drive the motor M, and the load current IL flowing to the motor M thus passes from power supply terminal Vb through shunt resistor 111 and to MOSFET 101a, then from MOSFET 101a through the motor M to MOSFET 101d and ultimately to ground. If the resistance of resistor 114, 115, and 116 is R114, R115, and R116, respectively, at this time, the potential difference between the ends of the shunt resistor 111 is converted by the operational amplifier 112 to voltage Va with a gain of R116/R114 referenced to the ground. The voltage Va can thus be expressed in this case by the following equation (A): EQU Va=IL.times.R111.times.R116/R114 (A)
where R111 is the resistance of shunt resistor 111.
For example, if R114=R115=5 k.OMEGA., R116=100 k.OMEGA., IL=20 A, and R111=5 m.OMEGA., equation (A) above shows that Va=2 V. The voltage Va thus obtained is then output through buffer 117 to the control circuit 103.
In the motor control circuit 100 thus comprised, however, there is a dead zone in which a low load current IL cannot be detected depending upon the value of the input offset voltage of the operational amplifier 112. That is, when the resistance of the shunt resistor 111 is low and the potential difference between the ends is low, the offset voltage of the operational amplifier 112 has a relatively greater effect on operation, and the current cannot be detected even though current is flowing to the motor M. For example, if the input offset voltage Vos of the operational amplifier 112, the potential difference of the non-inverting input to the inverting input, is 10 mV, the operational amplifier 112 will not operate unless the potential difference of the shunt resistor 111 is 10 mV or greater.
When the resistance R111 of the shunt resistor 111 is 5 m.OMEGA., the potential difference of the shunt resistor 111 is 10 mV at a 2 A load current IL. The voltage Va is therefore 0 V when the load current IL is less than 2 A, the input voltage Vm to the control circuit 103 is therefore also 0 V, and the load current IL cannot be detected. The relationship between the load current IL and input voltage Vm of the control circuit 103 depends upon the input offset voltage Vos of the operational amplifier 112 as shown in FIG. 6, and when the input offset voltage Vos is in the range 0 V to 10 mV, there is a dead zone in which the load current IL cannot be detected.
Although the object and configuration differ from those of the present invention, Japanese Patent Laid-Open Publication No. 10-117112 teaches a circuit in which a non-inverting input side 31 of an operational amplifier 3 is connected to a first reference potential P.sub.1, and an inverting input side 32 of the operational amplifier 3 is connected to a second reference potential P.sub.2 through the constant current source of a current copying circuit 8. Likewise, Japanese Patent Laid-Open Publication No. 10-51246 teaches a circuit in which the base of a current sink transistor 18 in a low voltage operational amplifier 10 is biased by connection to a current sink 15, and a dc loop through a sink control circuit 14 and source control circuit 22 produces a base drive current bias in transistors 18 and 24.
Furthermore, although the object and configuration again differ from those of the present invention, Japanese Patent Laid-Open Publication No. 10-41759 teaches a circuit in which a bias current I.sub.p is supplied from a transistor 26 forming a current mirror circuit to the bases of transistors 12 and 13 in the power output stage 6 of an operational amplifier 1, and when biased to an AB-class state a quiescent current is controlled by a transistor 18 in gain stage 5.
Yet further, and while again the object and configuration differ from those of the present invention, Japanese Patent Laid-Open Publication No. 10-127091 teaches a circuit in which a mirror current reflecting the current of a drive transistor for driving a motor is produced in a detection transistor, and the amplitude of current flowing to the drive transistor is controlled according to the mirror current of the detection transistor. Likewise, Japanese Patent Laid-Open Publication No. 10-90312 teaches a current detection circuit 100 for supplying an output signal I.sub.out, which is indicative of a current signal I.sub.d flowing to an FET output device 101, to an output 110 irrespective of change in the drain-source voltage V.sub.DS of the FET output device 101.